| dc.contributor.advisor | Hae-Seung Lee. | en_US |
| dc.contributor.author | Courcy, Matthew Louis, 1973- | en_US |
| dc.date.accessioned | 2010-01-07T20:34:39Z | |
| dc.date.available | 2010-01-07T20:34:39Z | |
| dc.date.copyright | 1998 | en_US |
| dc.date.issued | 1988 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/50392 | |
| dc.description | Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science; and, Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1988. | en_US |
| dc.description | Includes bibliographical references (p. 115-116). | en_US |
| dc.description.statementofresponsibility | by Matthew Louis Courcy. | en_US |
| dc.format.extent | 116 p. | en_US |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | M.I.T. theses are protected by
copyright. They may be viewed from this source for any purpose, but
reproduction or distribution in any format is prohibited without written
permission. See provided URL for inquiries about permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | en_US |
| dc.subject | Electrical Engineering and Computer Science | en_US |
| dc.title | Feasibility of a 16bit, 3MSPS multibit per stage pipeline ADC using digital calibration | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | B.S. | en_US |
| dc.description.degree | M.Eng. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 40451687 | en_US |
