Cycle time reduction through wafer starts control

Abstract

Intel's Fab 17, located in Hudson, Massachusetts, has experienced dramatic improvements in its cycle time performance in the last two years. These improvements have been attributed to lean implementation efforts, reduced tool variability, as well as other key initiatives. In its efforts to continuously improve cycle time and cycle time variability, a new methodology of conducting wafer starts was developed and pilot implementations were conducted. The new methodology was based upon the concept of Little's Law of Cycle Time = Inventory / Output, whereby controlling the level of inventory through wafer starts would positively impact cycle time performance. Thus, by monitoring the current Work-in-Process levels at selected areas of operations and contrasting it with the optimal levels based upon Little's Law, an appropriate level of wafer starts could be determined.Close collaboration between the manufacturing, engineering, and planning departments allowed for the creation and pilot implementations of the wafer starts control model. The pilot implementations were conducted in three separate phases, providing opportunities for data analyses and methodology improvements. Model parameters and logic were modified between each phase to better reflect actual fab realities and to achieve more effective outcomes. Positive results were observed during the pilot implementations, as cycle time variability (as defined by standard deviations) decreased and overall fab cycle time remained consistently lower, all during a period of increased production. As of the conclusion of the internship, Fl7 planned to adopt the wafer starts control model as part of its routine starts process.