dc.contributor.author | Nicolaou, Nicolas | |
dc.contributor.author | Cadambe, Viveck | |
dc.contributor.author | Prakash, N. | |
dc.contributor.author | Konwar, Kishori | |
dc.contributor.author | Medard, Muriel | |
dc.contributor.author | Lynch, Nancy | |
dc.date.accessioned | 2022-11-22T16:55:10Z | |
dc.date.available | 2021-11-05T18:44:14Z | |
dc.date.available | 2022-05-31T20:27:57Z | |
dc.date.available | 2022-11-22T16:55:10Z | |
dc.date.issued | 2019-10 | |
dc.date.submitted | 2019-07 | |
dc.identifier.issn | 2575-8411 | |
dc.identifier.issn | 978-1-7281-2519-0 | |
dc.identifier.uri | https://hdl.handle.net/1721.1/137575.3 | |
dc.description.abstract | © 2019 IEEE. Emulating a shared atomic, read/write storage system is a fundamental problem in distributed computing. Replicating atomic objects among a set of data hosts was the norm for traditional implementations (e.g., [6]) in order to guarantee the availability and accessibility of the data despite host failures. As replication is highly storage demanding, recent approaches suggested the use of erasure-codes to offer the same fault-tolerance while optimizing storage usage at the hosts. Initial works focused on a fix set of data hosts. To guarantee longevity and scalability, a storage service should be able to dynamically mask hosts failures by allowing new hosts to join, and failed host to be removed without service interruptions. This work presents the first erasure-code based atomic algorithm, called ARES, which allows the set of hosts to be modified in the course of an execution. ARES is composed of three main components: (i) a reconfiguration protocol, (ii) a read/write protocol, and (iii) a set of data access primitives. The design of ARES is modular and is such to accommodate the usage of various erasure-code parameters on a per-configuration basis. We provide bounds on the latency of read/write operations and analyze the storage and communication costs of the ARES algorithm. | en_US |
dc.language.iso | en | |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) | en_US |
dc.relation.isversionof | http://dx.doi.org/10.1109/icdcs.2019.00216 | en_US |
dc.rights | Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use. | en_US |
dc.source | ACM | en_US |
dc.title | ARES: Adaptive, Reconfigurable, Erasure Coded, Atomic Storage | en_US |
dc.type | Article | en_US |
dc.identifier.citation | Nicolaou, Nicolas, Cadambe, Viveck, Prakash, N, Konwar, Kishori, Medard, Muriel et al. 2019. "ARES: Adaptive, Reconfigurable, Erasure Coded, Atomic Storage." Proceedings - International Conference on Distributed Computing Systems, 2019-July. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory | |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
dc.contributor.department | Massachusetts Institute of Technology. Research Laboratory of Electronics | |
dc.relation.journal | Proceedings - International Conference on Distributed Computing Systems | en_US |
dc.eprint.version | Final published version | en_US |
dc.type.uri | http://purl.org/eprint/type/ConferencePaper | en_US |
eprint.status | http://purl.org/eprint/status/NonPeerReviewed | en_US |
dc.date.updated | 2021-01-29T13:46:40Z | |
dspace.orderedauthors | Nicolaou, N; Cadambe, V; Prakash, N; Konwar, K; Medard, M; Lynch, N | en_US |
dspace.date.submission | 2021-01-29T13:46:44Z | |
mit.journal.volume | 2019-July | en_US |
mit.license | PUBLISHER_POLICY | |
mit.metadata.status | Authority Work Needed | en_US |