| dc.contributor.advisor | William J. Dally. | en_US |
| dc.contributor.author | Fiske, James Alexander Stuart | en_US |
| dc.date.accessioned | 2007-04-03T16:56:55Z | |
| dc.date.available | 2007-04-03T16:56:55Z | |
| dc.date.copyright | 1995 | en_US |
| dc.date.issued | 1995 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1721.1/36968 | |
| dc.description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1995. | en_US |
| dc.description | Includes bibliographical references (p. 200-290). | en_US |
| dc.description.statementofresponsibility | by James Alexander Stuart Fiske. | en_US |
| dc.format.extent | 209 p. | en_US |
| dc.language.iso | eng | en_US |
| dc.publisher | Massachusetts Institute of Technology | en_US |
| dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
| dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | |
| dc.subject | Electrical Engineering and Computer Science | en_US |
| dc.title | Thread scheduling mechanisms for multiple-context parallel processors | en_US |
| dc.type | Thesis | en_US |
| dc.description.degree | Ph.D. | en_US |
| dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
| dc.identifier.oclc | 33227013 | en_US |
