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6.823 Computer System Architecture, Spring 2002

Author(s)
Asanovic, Krste; Arvind, V.; Devadas, Srinivas; Hoe, James C. (James Chu-Yue)
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Alternative title
Computer System Architecture
Terms of use
Usage Restrictions: This site (c) Massachusetts Institute of Technology 2003. Content within individual courses is (c) by the individual authors unless otherwise noted. The Massachusetts Institute of Technology is providing this Work (as defined below) under the terms of this Creative Commons public license ("CCPL" or "license"). The Work is protected by copyright and/or other applicable law. Any use of the work other than as authorized under this license is prohibited. By exercising any of the rights to the Work provided here, You (as defined below) accept and agree to be bound by the terms of this license. The Licensor, the Massachusetts Institute of Technology, grants You the rights contained here in consideration of Your acceptance of such terms and conditions.
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Abstract
Emphasizes the relationship among technology, hardware organization, and programming systems in the evolution of computer architecture. Pipelined, out-of-order, and speculative execution. Superscaler, VLIW, vector, and multithreaded processors. Addressing structures and virtual memory, and exception handling. I/O and memory systems. Parallel computers; message passing and shared memory systems. Memory models, synchronization, and cache coherence protocols. Vector supercomputers. Assumes an undergraduate knowledge of computer systems. From the course home page: Course Description 6.823 is a study of the evolution of computer architecture and the factors influencing the design of hardware and software elements of computer systems. Topics may include: instruction set design; processor micro-architecture and pipelining; cache and virtual memory organizations; protection and sharing; I/O and interrupts; in-order and out-of-order superscalar architectures; VLIW machines; vector supercomputers; multithreaded architectures; symmetric multiprocessors; and parallel computers.
Date issued
2002-06
URI
http://hdl.handle.net/1721.1/35849
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Other identifiers
6.823-Spring2002
local: 6.823
local: IMSCP-MD5-96dcefd5806926cb33055fc1fc7c4490
Keywords
computer architecture, computer system architecture, hardware, hardware design, software, software design, instruction set design, processor micro-architecture, pipelining, cache memory, virtual memory, I/O, input/output, interrupts, superscalar architectures, VLIW machines, vector supercomputers, multithreaded architectures, symmetric multiprocessors, parallel computers, Computer architecture

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