dc.contributor.advisor | Jonathan Allen. | en_US |
dc.contributor.author | Bamji, Cyrus S | en_US |
dc.contributor.other | Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science. | en_US |
dc.date.accessioned | 2005-08-10T18:57:40Z | |
dc.date.available | 2005-08-10T18:57:40Z | |
dc.date.copyright | 1989 | en_US |
dc.date.issued | 1990 | en_US |
dc.identifier.uri | http://hdl.handle.net/1721.1/13999 | |
dc.description | Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1990. | en_US |
dc.description | Includes bibliographical references (leaves 193-196). | en_US |
dc.description.statementofresponsibility | by Cyrus S. Bamji. | en_US |
dc.format.extent | 196 leaves | en_US |
dc.format.extent | 14621940 bytes | |
dc.format.extent | 14621696 bytes | |
dc.format.mimetype | application/pdf | |
dc.format.mimetype | application/pdf | |
dc.language.iso | eng | en_US |
dc.publisher | Massachusetts Institute of Technology | en_US |
dc.rights | M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. | en_US |
dc.rights.uri | http://dspace.mit.edu/handle/1721.1/7582 | |
dc.subject | Electrical Engineering and Computer Science. | en_US |
dc.title | Graph-based representations and coupled verification of VLSI schematics and layouts | en_US |
dc.type | Thesis | en_US |
dc.description.degree | Ph.D. | en_US |
dc.contributor.department | Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science | |
dc.identifier.oclc | 23117187 | en_US |