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Design, process, and reliability considerations in silicon-on-insulator (SOI) MOSFETs

dc.contributor.advisorDimitri A. Antoniadis.en_US
dc.contributor.authorSherony, Melanie J. (Melanie Jane)en_US
dc.date.accessioned2005-08-18T23:55:39Z
dc.date.available2005-08-18T23:55:39Z
dc.date.copyright1998en_US
dc.date.issued1998en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/10049
dc.descriptionThesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.en_US
dc.descriptionIncludes bibliographical references (p. 111-119en_US
dc.description.statementofresponsibilityby Melanie J. Sherony.en_US
dc.format.extent135 p.en_US
dc.format.extent10435149 bytes
dc.format.extent10434907 bytes
dc.format.mimetypeapplication/pdf
dc.format.mimetypeapplication/pdf
dc.language.isoengen_US
dc.publisherMassachusetts Institute of Technologyen_US
dc.rightsM.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.en_US
dc.rights.urihttp://dspace.mit.edu/handle/1721.1/7582
dc.subjectElectrical Engineering and Computer Scienceen_US
dc.titleDesign, process, and reliability considerations in silicon-on-insulator (SOI) MOSFETsen_US
dc.typeThesisen_US
dc.description.degreePh.D.en_US
dc.contributor.departmentMassachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
dc.identifier.oclc39134643en_US


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