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dc.contributor.authorLee, Boon Chaien_US
dc.contributor.otherMassachusetts Institute of Technology. Flight Transportation Laboratoryen_US
dc.date.accessioned2012-01-06T22:25:06Z
dc.date.available2012-01-06T22:25:06Z
dc.date.issued1982en_US
dc.identifier29178107en_US
dc.identifier.urihttp://hdl.handle.net/1721.1/68106
dc.descriptionJune 1982en_US
dc.descriptionAlso issued as an M.S. thesis, Dept. of Aeronautics and Astronautics, 1982en_US
dc.descriptionIncludes bibliographical references (p. 129-132)en_US
dc.description.abstractA review of methods of enumerating elementary cycles and circuits is presented. For the directed planar graph, a geometric view of circuit generation is introduced making use of the properties of dual graphs. Given the set of elementary cycles or circuits, a particular algorithm is recommended to generate all simple circuits. A simple example accompanies each of the methods discussed. Some methods of reducing the size of the graph but maintaining all circuits are introduced. Worst-case bounds on computational time and space are also given. The problem of enumerating elementary circuits whose cost is less than a certain fixed cost is solved by modifying an existing algorithm. The cost of a circuit is the sum of the cost of the arcs forming the circuit where arc costs are not restricted to be positive. Applications of circuits with particular properties are suggested.en_US
dc.format.extent132 pen_US
dc.publisherCambridge, Mass. : Massachusetts Institute of Technology, Dept. of Aeronautics & Astronautics, Flight Transportation Laboratory, [1982]en_US
dc.relation.ispartofseriesFTL report (Massachusetts Institute of Technology. Flight Transportation Laboratory) ; R82-7en_US
dc.subjectGraph theoryen_US
dc.subjectAlgorithmsen_US
dc.subjectData processingen_US
dc.titleAlgorithmic approaches to circuit enumeration problems and applicationsen_US
dc.typeTechnical Reporten_US


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