Computer Science and Artificial Intelligence Lab (CSAIL): Recent submissions

Now showing items 250-252 of 3794

    • Correctness Proof for a Network Synchronizer 

      Devarajan, Harish; Fekete, Alan; Lynch, Nancy A.; Shrira, Liuba (1993-12)
      In this paper we offer a formal, rigorous proof of the correctness of Awerbuch's algorithm for network synchronization [1]. We specify both the algorithm and the correctness condition using the I/O automaton model.

    • Liveness in Timed and Untimed Systems 

      Gawlick, Rainer; Segala, Roberto; Søgaard-Andersen, Jørgen; Lynch, Nancy A. (1993-12)
      When proving the correctness of algorithms in distributed systems, one generally considers safety conditions and liveness conditions. The Input /Output (I/)0 automaton model and its timed version have used successfully, ...

    • Virtual Wires: Overcoming Pin Limitations in FPGA-based Logic Emulation 

      Babb, Jonathan William (1993-11)
      Existing FPGA-based logic emulators are limited by inter-chip communication bandwidth, resulting in low gate utilization (10 to 20 percent of usable gates). This resource imbalance increases the number of chips needed to ...