RM³ Processing for In-plane Optical Interconnects on Si-CMOS and the Impact of Topographic Features on Losses in Deposited Dielectric Waveguides

Abstract

This paper describes recent progress in a continuing program to develop and apply RM³ (recess mounting with monolithic metallization) technologies for heterogeneous integration. Particular emphasis is placed on the applicability of RM³ integration to in-plane geometries for on-chip optical clock and signal distribution and on the suitability of commercially processed IC wafers for use as substrates for rectangular dielectric waveguides.