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dc.contributor.advisorAgarwal, Ananten_US
dc.contributor.authorKubiatowicz, John Daviden_US
dc.date.accessioned2023-03-29T15:21:23Z
dc.date.available2023-03-29T15:21:23Z
dc.date.issued1993-02
dc.identifier.urihttps://hdl.handle.net/1721.1/149756
dc.description.abstractMultiprocessor architects have begun to explore several mechanisms such as prefetching, context-switching and software-assisted dynamic cache-coherence, which transform single-phase memory transactions in conventional memory systems into multi-phase operations.en_US
dc.relation.ispartofseriesMIT-LCS-TR-594
dc.titleClosing the Window of Vulnerability in Multiphase memory transaction: The alewife transaction storeen_US


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