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Jenga: Harnessing Heterogeneous Memories through Reconfigurable Cache Hierarchies

Author(s)
Beckmann, Nathan; Tsai, Po-An; Sanchez, Daniel
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DownloadMIT-CSAIL-TR-2015-035.pdf (1.877Mb)
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Computer Architecture
Advisor
Daniel Sanchez
Terms of use
Creative Commons Attribution 4.0 International http://creativecommons.org/licenses/by/4.0/
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Abstract
Conventional memory systems are organized as a rigid hierarchy, with multiple levels of progressively larger and slower memories. Hierarchy allows a simple, fixed design to benefit a wide range of applications, because working sets settle at the smallest (and fastest) level they fit in. However, rigid hierarchies also cause significant overheads, because each level adds latency and energy even when it does not capture the working set. In emerging systems with heterogeneous memory technologies such as stacked DRAM, these overheads often limit performance and efficiency. We propose Jenga, a reconfigurable cache hierarchy that avoids these pathologies and approaches the performance of a hierarchy optimized for each application. Jenga monitors application behavior and dynamically builds virtual cache hierarchies out of heterogeneous, distributed cache banks. Jenga uses simple hardware support and a novel software runtime to configure virtual cache hierarchies. On a 36-core CMP with a 1 GB stacked-DRAM cache, Jenga outperforms a combination of state-of-the-art techniques by 10% on average and by up to 36%, and does so while saving energy, improving system-wide energy-delay product by 29% on average and by up to 96%.
Date issued
2015-12-19
URI
http://hdl.handle.net/1721.1/100466
Series/Report no.
MIT-CSAIL-TR-2015-035

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